Multiplication without multiplying to improve computing efficiency
Aravind Nagulu, Shantanu Chakrabartty among investigators in new DARPA research
Radar and sonar play a vital role in detecting or avoiding other aircraft or underwater vessels. They rely on digital signal processing systems, but some calculations involving multiplications consume a lot of power, which can limit the system's efficiency. These calculations are crucial to various applications, including artificial intelligence, machine learning, wireless communication, and military applications. However, such computations can be costly, particularly for correlators used in radar systems, which rely heavily on fast multiplication.
To address this challenge, a multi-institutional team of researchers led by Aravind Nagulu, assistant professor of electrical and systems engineering in the McKelvey School of Engineering at Washington University in St. Louis, has secured a four-year, $2 million grant from the Defense Advanced Research Projects Agency (DARPA) Massive Cross-Correlation (MAX) project. The team aims to enhance the computational efficiency of radio-frequency (RF) correlators, which are commonly used to find similarity between two signals. Other investigators include Shantanu Chakrabartty, the Clifford W. Murphy Professor in the McKelvey School of Engineering; Arun Natarajan, professor of electrical engineering and computer science at Oregon State University; and Gert Cauwenberghs, professor of bioengineering at University of California San Diego.
Traditionally, to realize correlators, researchers digitize the two signals into digital bits of zeros and ones, then multiply and accumulate them digitally, also known as multiply and accumulate (MAC). However, each multiplication requires up to 200 transistors, or semiconductor devices used to switch electrical signals, Nagulu said. More recently, researchers also realized these multiplications in analog domain using current and voltages instead of digital bits, but these techniques are based on old semiconductor processes that are not favorable to rest of the digital system or would require extensive post processing, increasing the fabrication cost.
The co-investigators will combine their expertise to find correlation or similarity between two signals to do a similar computation — but without the multiplication — and expects the same results.
“We will emulate the multiplication without actually doing the multiplication,” Nagulu said. “Using addition, subtraction and thresholding to emulate multiplication would be a huge win, because multiplication is expensive; while additions, subtractions and thresholding can be implemented by exploiting basic device physics and universal conservation laws.”
Nagulu’s team will use an analog circuit involving diodes and capacitors to replace the multiplication block, which uses less power and can be scaled up to a larger correlation size. This process would only require five to 10 transistors per multiplication, he said.
Nagulu said the proposed technique could have a significant impact on design of RF correlators.
“Typically, the performance of analog circuits drops when we go to a lower process; therefore, analog wants to be in an old process, which is a problem at the system level because digital circuits heavily rely on advantages gained from process scaling,” he explained. “To battle this trade-off, we proposed an analog circuit scheme that is process insensitive. The techniques that we are exploring can work in a newer and scaled fabrication process, if need be, and an older process if you want to cut down the cost. In this project, we are trying to show the performance in the more scaled process so that it can be compatible with the digital front end.”
Click on the topics below for more stories in those areas
Faculty in this story